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C906 RISC-V Board

C906 RISC-V Board

C906 RISC-V Board design, development, and manufacture are the main specialties of Ningbo Hi-tech Easy Choice Technology Co., Ltd.'s high-tech business. Our business enjoys a stellar reputation for providing excellent service, cultivating long-lasting alliances with eminent corporations, governmental organizations, and a sizable user base. Our areas of specialization include the development of complete intelligent electronic control boards, the design of mechanical and electrical control products, the creation of single-chip microcomputers, circuit design, and post-production testing services. We have the capacity to develop control circuits that are customized to your needs, bringing the functionality of your desired product to life, whether you offer us with detailed functional specifications or just a vague idea.

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Product Description

YCTECH industrial product control board development includes industrial control board software design, software upgrade, schematic diagram design, PCB design, PCB production and PCBA processing located in the east coast of China. Our company designs, develops and manufactures C906 RISC-V board. Ali Group Pingtouge has successively launched several RISCV processors, and some processors have been applied in the industry. For example, in a certain Zhi’s D1 processor, Pingtouge’s Xuantie C906 core is embedded as the "core". Although RISCV is an open standard, and there are some RTL implementations of open source cores on the Internet, commercial RISCV cores are generally closed source. But what is surprising is that in October this year, Brother Pingtou open sourced the four RISCV cores he designed, including the C906 core used by D1.

Xuantie C906 is a low-cost 64-bit RISC-V architecture processor core developed by Alibaba Pingtouge Semiconductor Co., Ltd. Xuantie C906 is based on the 64-bit RISC-V architecture and has expanded and enhanced the RISC-V architecture. Extended enhancements include:

1. Instruction set enhancement: Focus on four aspects of memory access, arithmetic operations, bit operations, and Cache operations, and a total of 130 instructions have been expanded. At the same time, the Xuantie processor development team supports these instructions at the compiler level. Except for the Cache operation instructions, these instructions can be compiled and generated, including GCC and LLVM compilation.

2. Memory model enhancement: Extend memory page attributes, support page attributes such as Cacheable and Strong order, and support them on the Linux kernel.

Key architectural parameters of the Xuantie C906 include:

RV64IMA[FD]C[V] Architecture

Pingtouge instruction expansion and enhancement technology

Pingtouge memory model enhancement technology

5-stage integer pipeline, single-issue sequential execution

128-bit vector computing unit, supports SIMD computing of FP16/FP32/INT8/INT16/INT32.

C906 is an RV64-bit instruction set, 5-level sequential single launch, 8KB-64KB L1 Cache support, no L2 Cache support, half/single/double precision support, VIPT four-way combination L1 data cache.

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